diff --git a/build.sh b/build.sh
index 882e0466..5915e7de 100755
--- a/build.sh
+++ b/build.sh
@@ -186,7 +186,7 @@ do
 	fi
 done
 
-[ -n "${_SIMPLE_INIT}" ]||[ ${BUILD_GUI} == false ]||error "SimpleInit not found, please see README.md"
+[ -n "${_SIMPLE_INIT}" ]||[ ${BUILD_GUI} == false ]||_error "SimpleInit not found, please see README.md"
 [ -f "configs/${DEVICE}.conf" ]||[ "${DEVICE}" == "all" ]||_error "Device configuration not found"
 
 if [ ${MACHINE_TYPE} != 'aarch64' ]; then
diff --git a/edk2-rockchip/Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.c b/edk2-rockchip/Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.c
index f26d428a..d5c622a1 100644
--- a/edk2-rockchip/Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.c
+++ b/edk2-rockchip/Silicon/Rockchip/Library/DisplayLib/DwHdmiQpLib.c
@@ -145,8 +145,9 @@ DwHdmiQpRegMod (
     BASE = HDMI1_BASE;
 
   Val = MmioRead32(BASE + Offset);
-  Val &= ~Mask;
-  Val |= Value;
+//  Val &= ~Mask;
+//  Val |= Value;
+  Val |= Value & Mask;
 
   MmioWrite32(BASE + Offset, Val);
 };
@@ -574,8 +575,8 @@ DwHdmiQpConnectorPreInit (
     ConnectorState->OutputInterface = VOP_OUTPUT_IF_HDMI0;
 
   DwHdmiQpSetIomux(Hdmi);
-  DwHdmiQpI2cSetIomux(Hdmi);
-  DwHdmiI2cInit(Hdmi);
+  //DwHdmiQpI2cSetIomux(Hdmi);
+  //DwHdmiI2cInit(Hdmi);
 
   HdptxRopllCmnConfig(&Hdptx);
   DEBUG ((DEBUG_INFO, "%a hdmi pre init success\n", __func__));
@@ -685,7 +686,7 @@ DwHdmiQpSetup(
   DwHdmiQpRegMod(Hdmi, KEEPOUT_REKEY_ALWAYS, KEEPOUT_REKEY_CFG, FRAME_COMPOSER_CONFIG9);
   DwHdmiQpRegWrite(Hdmi, 0, FLT_CONFIG0);
 
-  DumpEdid(Hdmi);
+  //DumpEdid(Hdmi);
   
   //enable phy output
   HdptxRopllTmdsModeConfig(&Hdptx);
diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Emmc.asl b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Emmc.asl
index 0d086722..16abc0ee 100644
--- a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Emmc.asl
+++ b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Emmc.asl
@@ -48,27 +48,54 @@
           Case (1) {
             Local0 = DerefOf (Arg3 [0])
             If (Local0 >= 200000000) {
-              Store (0xFF000500, PLLE)
+              /*
+               * cclk_emmc_sel = clk_cpll_mux
+               * cclk_emmc_div = 5 (+1)
+               * aclk_nvm_root_sel unchanged
+               * aclk_nvm_root_div unchanged
+               * hclk_nvm_root_sel unchanged
+               */
+              Store (0xff004500, PLLE)
               Return (200000000)
             }
             If (Local0 >= 150000000) {
-              Store (0xFF000700, PLLE)
+              /*
+               * cclk_emmc_sel = clk_cpll_mux
+               * cclk_emmc_div = 7 (+1)
+               */
+              Store (0xff004700, PLLE)
               Return (150000000)
             }
             If (Local0 >= 100000000) {
-              Store (0xFF000B00, PLLE)
+              /*
+               * cclk_emmc_sel = clk_cpll_mux
+               * cclk_emmc_div = 11 (+1)
+               */
+              Store (0xff004B00, PLLE)
               Return (100000000)
             }
             If (Local0 >= 50000000) {
-              Store (0xFF001700, PLLE)
+              /*
+               * cclk_emmc_sel = clk_cpll_mux
+               * cclk_emmc_div = 23 (+1)
+               */
+              Store (0xff005700, PLLE)
               Return (50000000)
             }
             If (Local0 >= 24000000) {
-              Store (0xFF008000, PLLE)
+              /*
+               * cclk_emmc_sel = xin_osc0_func
+               * cclk_emmc_div = 0 (+1)
+               */
+              Store (0xff008000, PLLE)
               Return (24000000)
             }
             if (Local0 >= 375000) {
-              Store (0xFF00BF00, PLLE)
+              /*
+               * cclk_emmc_sel = xin_osc0_func
+               * cclk_emmc_div = 63 (+1)
+               */
+              Store (0xff00BF00, PLLE)
               Return (375000)
             }
             Return (0)
@@ -78,22 +105,6 @@
       Return (0)
     }
 
-    // Used by downstream Linux driver.
-    Method(SCLK, 1, Serialized) {
-      If (Arg0 <= 400000)
-      {
-        Store (0xFF00BF00, PLLE)
-      }
-      ElseIF (Arg0 <= 50000000)
-      {
-        Store (0xFF008000, PLLE)
-      }
-      Else
-      {
-        Store (0xFF000600, PLLE)
-      }
-    }
-
     /* TODO:
     Method(_PS3) {
 
@@ -130,4 +141,4 @@
         Return (0) // 0 - fixed
       }
     }
-  }
\ No newline at end of file
+  }
diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Sdhc.asl b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Sdhc.asl
index fb691b43..852a8df0 100644
--- a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Sdhc.asl
+++ b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Sdhc.asl
@@ -17,6 +17,19 @@
     Name (_S2D, 0x1)
     Name (_S3D, 0x1)
     Name (_S4D, 0x1)
+
+    Name (_DSD, Package () {
+	ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+        Package () {
+            Package () { "compatible", "rockchip,rk3588-dw-mshc" },
+            Package () { "fifo-depth", 0x100 },
+            Package () { "max-frequency", 50000000 },
+            Package () { "bus-width", 4 },
+            Package () { "cap-sd-highspeed", 1 },
+            Package () { "disable-wp", 1 },
+        }
+    })
+
     Method (_STA)
     {
       Return(0xf)
@@ -28,4 +41,4 @@
       })
       Return (RBUF)
     }
-  } //SDHC
\ No newline at end of file
+  } //SDHC
diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/GmacPlatformDxe/GmacPlatformDxe.c b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/GmacPlatformDxe/GmacPlatformDxe.c
index a3f2307d..1c4273c8 100644
--- a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/GmacPlatformDxe/GmacPlatformDxe.c
+++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/GmacPlatformDxe/GmacPlatformDxe.c
@@ -223,7 +223,7 @@ InitGmac1 (
   GmacIomux (1);
 
   /* Setup clocks */
-  MmioWrite32 (PHP_GRF_CLK_CON1, 0x03a00000);  // io_clksel_gmac1 = io
+  MmioWrite32 (PHP_GRF_CLK_CON1, 0x03a00200);  // io_clksel_gmac1 = cru
                                                // mii_tx_clk_sel_gamc1 = 125 MHz
                                                // rmii_mode_gmac1 = RGMII mode
 
@@ -285,8 +285,8 @@ GmacPlatformDxeInitialize (
             __func__,
             Hash[0], Hash[1], Hash[2],
             Hash[3], Hash[4], Hash[5]));
-    MacLo = Hash[3] | (Hash[2] << 8) | (Hash[1] << 16) | (Hash[0] << 24);
-    MacHi = Hash[5] | (Hash[4] << 8);
+    MacLo = Hash[0] | (Hash[1] << 8) | (Hash[2] << 16) | (Hash[3] << 24);
+    MacHi = Hash[4] | (Hash[6] << 8);
     MmioWrite32 (GMAC0_BASE + GMAC_MAC_ADDRESS0_LOW, MacLo);
     MmioWrite32 (GMAC0_BASE + GMAC_MAC_ADDRESS0_HIGH, MacHi);
   }
@@ -299,8 +299,8 @@ GmacPlatformDxeInitialize (
             __func__,
             Hash[0], Hash[1], Hash[2],
             Hash[3], Hash[4], Hash[5]));
-    MacLo = Hash[3] | (Hash[2] << 8) | (Hash[1] << 16) | (Hash[0] << 24);
-    MacHi = Hash[5] | (Hash[4] << 8);
+    MacLo = Hash[0] | (Hash[1] << 8) | (Hash[2] << 16) | (Hash[3] << 24);
+    MacHi = Hash[4] | (Hash[5] << 8);
     MmioWrite32 (GMAC1_BASE + GMAC_MAC_ADDRESS0_LOW, MacLo);
     MmioWrite32 (GMAC1_BASE + GMAC_MAC_ADDRESS0_HIGH, MacHi);
   }
diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/DwcSdhciPlatformLib/DwcSdhciPlatformLib.c b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/DwcSdhciPlatformLib/DwcSdhciPlatformLib.c
index 685da376..1d90ce3b 100644
--- a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/DwcSdhciPlatformLib/DwcSdhciPlatformLib.c
+++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/DwcSdhciPlatformLib/DwcSdhciPlatformLib.c
@@ -27,16 +27,16 @@ DwcSdhciSetClockRate (
   UINT32 CClkEmmcSel, Div;
 
   if (Frequency >= 200000000) {
-    CClkEmmcSel = 0;
+    CClkEmmcSel = 1;
     Div = 6;
   } else if (Frequency >= 150000000) {
-    CClkEmmcSel = 0;
+    CClkEmmcSel = 1;
     Div = 8;
   } else if (Frequency >= 100000000) {
-    CClkEmmcSel = 0;
+    CClkEmmcSel = 1;
     Div = 12;
   } else if (Frequency >= 50000000) {
-    CClkEmmcSel = 0;
+    CClkEmmcSel = 1;
     Div = 24;
   } else if (Frequency >= 24000000) {
     CClkEmmcSel = 2;