/* RSD PTR: OEM=ALASKA, ACPI_Rev=2.0x (2) XSDT=0x0000009ff5af0028, length=36, cksum=113 */ /* XSDT: Length=148, Revision=1, Checksum=2, OEMID=ALASKA, OEM Table ID=A M I, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 Entries={ 0x0000009ff5af00c0, 0x0000009ff5af7878, 0x0000009ff5af7918, 0x0000009ff5af7980, 0x0000009ff5af7a88, 0x0000009ff5af8658, 0x0000009ff5af8708, 0x0000009ff5af8738, 0x0000009ff5af8780, 0x0000009ff5af91e8, 0x0000009ff5af97b8, 0x0000009ff5af97e8, 0x0000009ff5af9b10, 0x0000009ff5af9b60 } */ /* FACP: Length=276, Revision=6, Checksum=37, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x3, Creator ID=INTL, Creator Revision=0x20190509 FACS=0x0, DSDT=0x0 INT_MODEL=PIC Preferred_PM_Profile=Performance Server (7) SCI_INT=0 SMI_CMD=0x0, ACPI_ENABLE=0x0, ACPI_DISABLE=0x0, S4BIOS_REQ=0x0 PSTATE_CNT=0x0 PM1a_EVT_BLK=0x0-0xffffffff PM1a_CNT_BLK=0x0-0xffffffff P_LVL2_LAT=0 us, P_LVL3_LAT=0 us FLUSH_SIZE=0, FLUSH_STRIDE=0 DUTY_OFFSET=0, DUTY_WIDTH=0 DAY_ALRM=0, MON_ALRM=0, CENTURY=0 IAPC_BOOT_ARCH={} Flags={HW_REDUCED} ArmBootFlags={PSCI_COMPLIANT} MinorRevision=1 X_FACS=0x0000009ff5b60040, X_DSDT=0x0000009ff5af01d8 X_PM1a_EVT_BLK=0x00000000:0[0] (Memory) X_PM1a_CNT_BLK=0x00000000:0[0] (Memory) HypervisorId=0x0000000000000000 */ /* DSDT: Length=30368, Revision=5, Checksum=69, OEMID=ALASKA, OEM Table ID=A M I, OEM Revision=0x1, Creator ID=INTL, Creator Revision=0x20190509 */ /* FIDT: Length=156, Revision=1, Checksum=154, OEMID=ALASKA, OEM Table ID=A M I, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 Data={ 46 49 44 54 9c 00 00 00 01 9a 41 4c 41 53 4b 41 41 20 4d 20 49 00 00 00 09 20 07 01 41 4d 49 20 13 00 01 00 24 46 49 44 04 78 00 4c 22 24 28 50 52 4f 4a 45 98 f3 bd 3b 66 2d 25 47 b4 a5 2c c0 47 b1 e6 b3 30 35 00 31 33 00 30 31 00 31 32 00 e3 07 0b 1d 0b 18 19 ff ff 41 4c 41 53 4b 41 41 20 4d 20 49 00 00 00 31 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff } */ /* DBG2: Length=97, Revision=0, Checksum=44, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x0, Creator ID=INTL, Creator Revision=0x20190509 Count=1 Device 0={ Revision=0 Length=53 RegisterCount=1 Namepath=\_SB.AHBC.URT1 PortType=Serial PortSubtype=ARM SBSA Generic BaseAddressOffset=0x0016 AddressSizeOffset=0x0022 } */ /* GTDT: Length=264, Revision=2, Checksum=42, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x1, Creator ID=INTL, Creator Revision=0x20190509 CounterBlockAddresss=ffffffffffffffff CounterReadBlockAddress=ffffffffffffffff SecureEl1 Timer GSIV=29 SecureEl1 Flags={Mode=level, Polarity=active-hi} NonSecureEl1 Timer GSIV=30 NonSecureEl1 Flags={Mode=level, Polarity=active-hi} VirtualTimer Timer GSIV=27 VirtualTimer Flags={Mode=level, Polarity=active-hi} NonSecureEl2 Timer GSIV=26 NonSecureEl2 Flags={Mode=level, Polarity=active-hi} Platform Timer Count=2 Type=GT Block Length=140 BlockAddress=0000000012700000 GT Block Timer Count=3 Frame Number=0 BaseAddress=0000000012710000 El0BaseAddress=ffffffffffffffff Physical Timer GSIV=88 Physical Timer Flags={Mode=Non-Secure, Polarity=active-hi} Virtual Timer GSIV=0 Virtual Timer Flags={Mode=Non-Secure, Polarity=active-hi} Common Flags={Mode=Non-Secure, always-on} Frame Number=1 BaseAddress=0000000012720000 El0BaseAddress=ffffffffffffffff Physical Timer GSIV=89 Physical Timer Flags={Mode=Non-Secure, Polarity=active-hi} Virtual Timer GSIV=0 Virtual Timer Flags={Mode=Non-Secure, Polarity=active-hi} Common Flags={Mode=Non-Secure, always-on} Frame Number=2 BaseAddress=0000000012730000 El0BaseAddress=ffffffffffffffff Physical Timer GSIV=90 Physical Timer Flags={Mode=Non-Secure, Polarity=active-hi} Virtual Timer GSIV=0 Virtual Timer Flags={Mode=Non-Secure, Polarity=active-hi} Common Flags={Mode=Non-Secure, always-on} Type=Watchdog GT Length=28 RefreshFrameAddress=00000000127d0000 ControlFrameAddress=00000000127c0000 GSIV=92 Flags={Mode=level, Polarity=active-hi, Non-Secure} */ /* IORT: Length=3020, Revision=0, Checksum=124, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x0, Creator ID=INTL, Creator Revision=0x20190509 IORT Nodes=15 Node offset=52 Length=24 Revision=0 Type=ITS group GIC ITS ID=0 MappingCount=0 Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=0 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=0 Output reference offset=524 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=1 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=8192 Output reference offset=524 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=2 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=16384 Output reference offset=1652 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=3 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=24576 Output reference offset=1652 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=4 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=16384 Output reference offset=524 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=5 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=2560 Output base=24576 Output reference offset=524 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=6 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=1792 Output base=8192 Output reference offset=1652 Flags={} } Length=56 Revision=0 Type=Root complex Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } ATS Attribute=not supported PCI Segment=7 Memory address size limit=42 MappingCount=1 Mapping offset=36 Mapping={ Input base=0 Count=1792 Output base=10240 Output reference offset=1652 Flags={} } Length=1128 Revision=0 Type=SMMUv1 or v2 Base Address=0000000014000000 Span=0000000000100000 Model=Arm Corelink MMU-500 Flags={COHERENT_WALK} NSgIrpt=121 NSgIrptFlags={Mode=level} NSgCfgIrpt=123 NSgCfgIrptFlags={Mode=level} Context Interrupts={ GSIV=176 Flags=0 GSIV=177 Flags=0 GSIV=178 Flags=0 GSIV=179 Flags=0 GSIV=180 Flags=0 GSIV=181 Flags=0 GSIV=182 Flags=0 GSIV=183 Flags=0 GSIV=184 Flags=0 GSIV=185 Flags=0 GSIV=186 Flags=0 GSIV=187 Flags=0 GSIV=188 Flags=0 GSIV=189 Flags=0 GSIV=190 Flags=0 GSIV=191 Flags=0 GSIV=192 Flags=0 GSIV=193 Flags=0 GSIV=194 Flags=0 GSIV=195 Flags=0 GSIV=196 Flags=0 GSIV=197 Flags=0 GSIV=198 Flags=0 GSIV=199 Flags=0 GSIV=200 Flags=0 GSIV=201 Flags=0 GSIV=202 Flags=0 GSIV=203 Flags=0 GSIV=204 Flags=0 GSIV=205 Flags=0 GSIV=206 Flags=0 GSIV=207 Flags=0 GSIV=208 Flags=0 GSIV=209 Flags=0 GSIV=210 Flags=0 GSIV=211 Flags=0 GSIV=212 Flags=0 GSIV=213 Flags=0 GSIV=214 Flags=0 GSIV=215 Flags=0 GSIV=216 Flags=0 GSIV=217 Flags=0 GSIV=218 Flags=0 GSIV=219 Flags=0 GSIV=220 Flags=0 GSIV=221 Flags=0 GSIV=222 Flags=0 GSIV=223 Flags=0 GSIV=224 Flags=0 GSIV=225 Flags=0 GSIV=226 Flags=0 GSIV=227 Flags=0 GSIV=228 Flags=0 GSIV=229 Flags=0 GSIV=230 Flags=0 GSIV=231 Flags=0 GSIV=232 Flags=0 GSIV=233 Flags=0 GSIV=234 Flags=0 GSIV=235 Flags=0 GSIV=236 Flags=0 GSIV=237 Flags=0 GSIV=238 Flags=0 GSIV=239 Flags=0 GSIV=240 Flags=0 GSIV=241 Flags=0 GSIV=242 Flags=0 GSIV=243 Flags=0 GSIV=244 Flags=0 GSIV=245 Flags=0 GSIV=246 Flags=0 GSIV=247 Flags=0 GSIV=248 Flags=0 GSIV=249 Flags=0 GSIV=250 Flags=0 GSIV=251 Flags=0 GSIV=252 Flags=0 GSIV=253 Flags=0 GSIV=254 Flags=0 GSIV=255 Flags=0 GSIV=256 Flags=0 GSIV=257 Flags=0 GSIV=258 Flags=0 GSIV=259 Flags=0 GSIV=260 Flags=0 GSIV=261 Flags=0 GSIV=262 Flags=0 GSIV=263 Flags=0 GSIV=264 Flags=0 GSIV=265 Flags=0 GSIV=266 Flags=0 GSIV=267 Flags=0 GSIV=268 Flags=0 GSIV=269 Flags=0 GSIV=270 Flags=0 GSIV=271 Flags=0 GSIV=272 Flags=0 GSIV=273 Flags=0 GSIV=274 Flags=0 GSIV=275 Flags=0 GSIV=276 Flags=0 GSIV=277 Flags=0 GSIV=278 Flags=0 GSIV=279 Flags=0 GSIV=280 Flags=0 GSIV=281 Flags=0 GSIV=282 Flags=0 GSIV=283 Flags=0 GSIV=284 Flags=0 GSIV=285 Flags=0 GSIV=286 Flags=0 GSIV=287 Flags=0 GSIV=288 Flags=0 GSIV=289 Flags=0 GSIV=290 Flags=0 GSIV=291 Flags=0 GSIV=292 Flags=0 GSIV=293 Flags=0 GSIV=294 Flags=0 GSIV=295 Flags=0 GSIV=296 Flags=0 GSIV=297 Flags=0 GSIV=298 Flags=0 GSIV=299 Flags=0 GSIV=300 Flags=0 GSIV=301 Flags=0 GSIV=302 Flags=0 GSIV=303 Flags=0 Pmu Interrupts={ GSIV=0 Flags=0 MappingCount=1 Mapping offset=1108 Mapping={ Input base=0 Count=65535 Output base=0 Output reference offset=52 Flags={} } Length=1128 Revision=0 Type=SMMUv1 or v2 Base Address=0000000015000000 Span=0000000000100000 Model=Arm Corelink MMU-500 Flags={COHERENT_WALK} NSgIrpt=125 NSgIrptFlags={Mode=level} NSgCfgIrpt=127 NSgCfgIrptFlags={Mode=level} Context Interrupts={ GSIV=304 Flags=0 GSIV=305 Flags=0 GSIV=306 Flags=0 GSIV=307 Flags=0 GSIV=308 Flags=0 GSIV=309 Flags=0 GSIV=310 Flags=0 GSIV=311 Flags=0 GSIV=312 Flags=0 GSIV=313 Flags=0 GSIV=314 Flags=0 GSIV=315 Flags=0 GSIV=316 Flags=0 GSIV=317 Flags=0 GSIV=318 Flags=0 GSIV=319 Flags=0 GSIV=320 Flags=0 GSIV=321 Flags=0 GSIV=322 Flags=0 GSIV=323 Flags=0 GSIV=324 Flags=0 GSIV=325 Flags=0 GSIV=326 Flags=0 GSIV=327 Flags=0 GSIV=328 Flags=0 GSIV=329 Flags=0 GSIV=330 Flags=0 GSIV=331 Flags=0 GSIV=332 Flags=0 GSIV=333 Flags=0 GSIV=334 Flags=0 GSIV=335 Flags=0 GSIV=336 Flags=0 GSIV=337 Flags=0 GSIV=338 Flags=0 GSIV=339 Flags=0 GSIV=340 Flags=0 GSIV=341 Flags=0 GSIV=342 Flags=0 GSIV=343 Flags=0 GSIV=344 Flags=0 GSIV=345 Flags=0 GSIV=346 Flags=0 GSIV=347 Flags=0 GSIV=348 Flags=0 GSIV=349 Flags=0 GSIV=350 Flags=0 GSIV=351 Flags=0 GSIV=352 Flags=0 GSIV=353 Flags=0 GSIV=354 Flags=0 GSIV=355 Flags=0 GSIV=356 Flags=0 GSIV=357 Flags=0 GSIV=358 Flags=0 GSIV=359 Flags=0 GSIV=360 Flags=0 GSIV=361 Flags=0 GSIV=362 Flags=0 GSIV=363 Flags=0 GSIV=364 Flags=0 GSIV=365 Flags=0 GSIV=366 Flags=0 GSIV=367 Flags=0 GSIV=368 Flags=0 GSIV=369 Flags=0 GSIV=370 Flags=0 GSIV=371 Flags=0 GSIV=372 Flags=0 GSIV=373 Flags=0 GSIV=374 Flags=0 GSIV=375 Flags=0 GSIV=376 Flags=0 GSIV=377 Flags=0 GSIV=378 Flags=0 GSIV=379 Flags=0 GSIV=380 Flags=0 GSIV=381 Flags=0 GSIV=382 Flags=0 GSIV=383 Flags=0 GSIV=384 Flags=0 GSIV=385 Flags=0 GSIV=386 Flags=0 GSIV=387 Flags=0 GSIV=388 Flags=0 GSIV=389 Flags=0 GSIV=390 Flags=0 GSIV=391 Flags=0 GSIV=392 Flags=0 GSIV=393 Flags=0 GSIV=394 Flags=0 GSIV=395 Flags=0 GSIV=396 Flags=0 GSIV=397 Flags=0 GSIV=398 Flags=0 GSIV=399 Flags=0 GSIV=400 Flags=0 GSIV=401 Flags=0 GSIV=402 Flags=0 GSIV=403 Flags=0 GSIV=404 Flags=0 GSIV=405 Flags=0 GSIV=406 Flags=0 GSIV=407 Flags=0 GSIV=408 Flags=0 GSIV=409 Flags=0 GSIV=410 Flags=0 GSIV=411 Flags=0 GSIV=412 Flags=0 GSIV=413 Flags=0 GSIV=414 Flags=0 GSIV=415 Flags=0 GSIV=416 Flags=0 GSIV=417 Flags=0 GSIV=418 Flags=0 GSIV=419 Flags=0 GSIV=420 Flags=0 GSIV=421 Flags=0 GSIV=422 Flags=0 GSIV=423 Flags=0 GSIV=424 Flags=0 GSIV=425 Flags=0 GSIV=426 Flags=0 GSIV=427 Flags=0 GSIV=428 Flags=0 GSIV=429 Flags=0 GSIV=430 Flags=0 GSIV=431 Flags=0 Pmu Interrupts={ GSIV=0 Flags=0 MappingCount=1 Mapping offset=1108 Mapping={ Input base=0 Count=65535 Output base=32768 Output reference offset=52 Flags={} } Length=60 Revision=2 Type=Named component Node Flags={PASID_BITS=0} Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } Memory address size=42 Device object Name=\_SB_.SAT0 MappingCount=1 Mapping offset=40 Mapping={ Input base=0 Count=256 Output base=0 Output reference offset=1652 Flags={SINGLE_MAPPING} } Length=60 Revision=2 Type=Named component Node Flags={PASID_BITS=0} Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } Memory address size=42 Device object Name=\_SB_.SAT1 MappingCount=1 Mapping offset=40 Mapping={ Input base=0 Count=256 Output base=2048 Output reference offset=1652 Flags={SINGLE_MAPPING} } Length=60 Revision=2 Type=Named component Node Flags={PASID_BITS=0} Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } Memory address size=42 Device object Name=\_SB_.USB0 MappingCount=1 Mapping offset=40 Mapping={ Input base=0 Count=256 Output base=4096 Output reference offset=1652 Flags={SINGLE_MAPPING} } Length=60 Revision=2 Type=Named component Node Flags={PASID_BITS=0} Memory Access={ CacheCoherency=Fully coherent Allocation Hints={} Memory Access Flags={COHERENCY,ATTRIBUTES} } Memory address size=42 Device object Name=\_SB_.USB1 MappingCount=1 Mapping offset=40 Mapping={ Input base=0 Count=256 Output base=6144 Output reference offset=1652 Flags={SINGLE_MAPPING} } */ /* MCFG: Length=172, Revision=1, Checksum=28, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x1, Creator ID=INTL, Creator Revision=0x20190509 Base Address=0x0000010000000000 Segment Group=0x0000 Start Bus=0 End Bus=31 Base Address=0x0000007800000000 Segment Group=0x0001 Start Bus=0 End Bus=31 Base Address=0x0000001000000000 Segment Group=0x0002 Start Bus=0 End Bus=31 Base Address=0x0000005800000000 Segment Group=0x0003 Start Bus=0 End Bus=31 Base Address=0x0000006000000000 Segment Group=0x0004 Start Bus=0 End Bus=31 Base Address=0x0000007000000000 Segment Group=0x0005 Start Bus=0 End Bus=7 Base Address=0x0000000600000000 Segment Group=0x0006 Start Bus=0 End Bus=7 Base Address=0x0000000400000000 Segment Group=0x0007 Start Bus=0 End Bus=7 */ /* SSDT: Length=45, Revision=2, Checksum=27, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x1, Creator ID=INTL, Creator Revision=0x20190509 Data={ 53 53 44 54 2d 00 00 00 02 1b 41 6d 70 65 72 65 65 4d 41 47 20 20 20 20 01 00 00 00 49 4e 54 4c 09 05 19 20 14 08 4d 41 49 4e 00 a4 00 } */ /* SPMI: Length=65, Revision=5, Checksum=124, OEMID=ALASKA, OEM Table ID=A M I, OEM Revision=0x0, Creator ID=AMI., Creator Revision=0x0 Interface Type=SMBus System Interface (SSIF) SpecRevision=2.0 Interrupt Type={ } Base Address=0x10:0[0] (SMBus) */ /* APIC: Length=2664, Revision=4, Checksum=254, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x4, Creator ID=, Creator Revision=0x1000013 Local APIC ADDR=0x00000000 Flags={PC-AT} Type=GIC CPU Interface Structure UID=0 CPU INTERFACE=0 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=0 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1 CPU INTERFACE=1 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=1 Efficiency Class=0 Type=GIC CPU Interface Structure UID=256 CPU INTERFACE=2 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=100 Efficiency Class=0 Type=GIC CPU Interface Structure UID=257 CPU INTERFACE=3 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=101 Efficiency Class=0 Type=GIC CPU Interface Structure UID=512 CPU INTERFACE=4 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=200 Efficiency Class=0 Type=GIC CPU Interface Structure UID=513 CPU INTERFACE=5 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=201 Efficiency Class=0 Type=GIC CPU Interface Structure UID=768 CPU INTERFACE=6 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=300 Efficiency Class=0 Type=GIC CPU Interface Structure UID=769 CPU INTERFACE=7 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=301 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1024 CPU INTERFACE=8 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=400 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1025 CPU INTERFACE=9 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=401 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1280 CPU INTERFACE=a Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=500 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1281 CPU INTERFACE=b Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=501 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1536 CPU INTERFACE=c Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=600 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1537 CPU INTERFACE=d Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=601 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1792 CPU INTERFACE=e Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=700 Efficiency Class=0 Type=GIC CPU Interface Structure UID=1793 CPU INTERFACE=f Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=701 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2048 CPU INTERFACE=10 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=800 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2049 CPU INTERFACE=11 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=801 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2304 CPU INTERFACE=12 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=900 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2305 CPU INTERFACE=13 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=901 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2560 CPU INTERFACE=14 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=a00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2561 CPU INTERFACE=15 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=a01 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2816 CPU INTERFACE=16 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=b00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=2817 CPU INTERFACE=17 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=b01 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3072 CPU INTERFACE=18 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=c00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3073 CPU INTERFACE=19 Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=c01 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3328 CPU INTERFACE=1a Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=d00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3329 CPU INTERFACE=1b Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=d01 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3584 CPU INTERFACE=1c Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=e00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3585 CPU INTERFACE=1d Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=e01 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3840 CPU INTERFACE=1e Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=f00 Efficiency Class=0 Type=GIC CPU Interface Structure UID=3841 CPU INTERFACE=1f Flags={enabled, Performance intr=level, VGIC intr=level} Parking Protocol Version=0 PERF INTR=23 Parked ADDR=0000000000000000 Base ADDR=0000000000000000 GICV=0000000000000000 GICH=0000000000000000 VGIC INTR=25 GICR ADDR=0000000000000000 MPIDR=f01 Efficiency Class=0 Type=GIC Distributor Structure GIC ID=0 Base ADDR=0000000078000000 Vector Base=0 GIC VERSION=3 Type=GIC Redistributor Structure Base ADDR=0000000078400000 Length=00400000 Type=GIC ITS Structure GIC ITS ID=0 Base ADDR=0000000078020000 */ /* PCCT: Length=1488, Revision=1, Checksum=247, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x3, Creator ID=, Creator Revision=0x1000013 Flags={DOORBELL} Type=HW-reduced Subspace Type 2 Platform Interrupt=56, Level triggered, Active high Base Address=0x0000009ff6820000 Length=256 Doorbell Register=0x11540010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11540020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=57, Level triggered, Active high Base Address=0x0000009ff6821000 Length=256 Doorbell Register=0x11541010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11541020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=58, Level triggered, Active high Base Address=0x0000009ff6822000 Length=256 Doorbell Register=0x11542010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000140 Latency=1000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11542020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=59, Level triggered, Active high Base Address=0x0000009ff6823000 Length=256 Doorbell Register=0x11543010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11543020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=60, Level triggered, Active high Base Address=0x0000009ff6824000 Length=256 Doorbell Register=0x11544010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11544020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=61, Level triggered, Active high Base Address=0x0000009ff6825000 Length=256 Doorbell Register=0x11545010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11545020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=62, Level triggered, Active high Base Address=0x0000009ff6826000 Length=256 Doorbell Register=0x11546010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11546020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=63, Level triggered, Active high Base Address=0x0000009ff6827000 Length=256 Doorbell Register=0x11547010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x11547020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=40, Level triggered, Active high Base Address=0x0000009ff6828000 Length=256 Doorbell Register=0x10540010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10540020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=41, Level triggered, Active high Base Address=0x0000009ff6829000 Length=256 Doorbell Register=0x10541010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10541020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=42, Level triggered, Active high Base Address=0x0000009ff682a000 Length=256 Doorbell Register=0x10542010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10542020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=43, Level triggered, Active high Base Address=0x0000009ff682b000 Length=256 Doorbell Register=0x10543010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10543020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=44, Level triggered, Active high Base Address=0x0000009ff682c000 Length=256 Doorbell Register=0x10544010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10544020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=45, Level triggered, Active high Base Address=0x0000009ff682d000 Length=256 Doorbell Register=0x10545010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10545020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=46, Level triggered, Active high Base Address=0x0000009ff682e000 Length=256 Doorbell Register=0x10546010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10546020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 Type=HW-reduced Subspace Type 2 Platform Interrupt=47, Level triggered, Active high Base Address=0x0000009ff682f000 Length=256 Doorbell Register=0x10547010:0[32] (Memory) Doorbell Preserve=0x0000000000000000 Doorbell Write=0x0000000053000040 Latency=10000 us Max Access Rate=0 Min Turnaround Time=0 us Platform Interrupt Ack Register=0x10547020:0[32] (Memory) Platform Interrupt Ack Preserve=0x0000000000000000 Platform Interrupt Ack Write=0x0000000000010001 */ /* BERT: Length=48, Revision=1, Checksum=78, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x3, Creator ID=INTL, Creator Revision=0x20190509 Length of Boot Error Region=49312 bytes Physical Address of Region=0x9ff5ab0020 */ /* HEST: Length=808, Revision=1, Checksum=135, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x3, Creator ID=INTL, Creator Revision=0x20190509 Error Source Count=12 Type={Generic Hardware Error Source} SourceId=0 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=2 Max Raw Data Length=256 Error Status Address=0x0000009ff5ac0018:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=532 Type={Generic Hardware Error Source} SourceId=1 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=4 Max Raw Data Length=768 Error Status Address=0x0000009ff5ac1c18:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=1044 Type={Generic Hardware Error Source} SourceId=2 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=6 Max Raw Data Length=1280 Error Status Address=0x0000009ff5ac3818:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=1556 Type={Generic Hardware Error Source} SourceId=3 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=24 Max Raw Data Length=5888 Error Status Address=0x0000009ff5ac5418:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=6052 Type={Generic Hardware Error Source} SourceId=4 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=2 Max Raw Data Length=256 Error Status Address=0x0000009ff5ac7018:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=532 Type={Generic Hardware Error Source} SourceId=5 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=10 Max Raw Data Length=2304 Error Status Address=0x0000009ff5ac8c18:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=2580 Type={Generic Hardware Error Source} SourceId=6 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=12 Max Raw Data Length=2816 Error Status Address=0x0000009ff5aca818:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=3092 Type={Generic Hardware Error Source} SourceId=7 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=8 Max Raw Data Length=1792 Error Status Address=0x0000009ff5acc418:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=2068 Type={Generic Hardware Error Source} SourceId=8 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=2 Max Raw Data Length=256 Error Status Address=0x0000009ff5ace018:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=532 Type={Generic Hardware Error Source} SourceId=9 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=17 Max Raw Data Length=4096 Error Status Address=0x0000009ff5acfc18:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=4372 Type={Generic Hardware Error Source} SourceId=10 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=24 Max Raw Data Length=5888 Error Status Address=0x0000009ff5ad1818:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=6164 Type={Generic Hardware Error Source} SourceId=11 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=4 Max Raw Data Length=768 Error Status Address=0x0000009ff5ad3418:0[64] (Memory) HW Error Notification={ Type={SCI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=0 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=1044 */ /* SPCR: Length=80, Revision=2, Checksum=186, OEMID=A M I, OEM Table ID=APTIO V, OEM Revision=0x1072009, Creator ID=AMI., Creator Revision=0x5000d Interface Type=ARM PL011 Serial Port=0x12600000:0[32] (Memory) Interrupt Type={ ARMH GIC={ GSI=98 } } Baud Rate=115200 Parity={OFF} Stop Bits={ON} Flow Control={} Terminal=VT-UTF8 PCI Device=NONE PCI Flags={} */ /* PPTT: Length=3256, Revision=1, Checksum=233, OEMID=Ampere, OEM Table ID=eMAG, OEM Revision=0x3, Creator ID=, Creator Revision=0x1000013 Type=processor Length=20 Flags={PHYSICAL_PACKAGE} Parent=00000000 ACPI Processor ID=0x00000000 private resources=0 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000001 private resources=1 private resources0=00000038 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000002 private resources=1 private resources0=00000068 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000003 private resources=1 private resources0=00000098 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000004 private resources=1 private resources0=000000c8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000005 private resources=1 private resources0=000000f8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000006 private resources=1 private resources0=00000128 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000007 private resources=1 private resources0=00000158 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000008 private resources=1 private resources0=00000188 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000009 private resources=1 private resources0=000001b8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000a private resources=1 private resources0=000001e8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000b private resources=1 private resources0=00000218 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000c private resources=1 private resources0=00000248 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000d private resources=1 private resources0=00000278 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000e private resources=1 private resources0=000002a8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x0000000f private resources=1 private resources0=000002d8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=262144 Associativity=32 Cache type=Unified Write Policy=Write back Type=processor Length=24 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000024 ACPI Processor ID=0x00000010 private resources=1 private resources0=00000308 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000050 ACPI Processor ID=0x00000000 private resources=2 private resources0=00000350 private resources1=00000338 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000050 ACPI Processor ID=0x00000001 private resources=2 private resources0=0000039c private resources1=00000384 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000080 ACPI Processor ID=0x00000100 private resources=2 private resources0=000003e8 private resources1=000003d0 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000080 ACPI Processor ID=0x00000101 private resources=2 private resources0=00000434 private resources1=0000041c Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000000b0 ACPI Processor ID=0x00000200 private resources=2 private resources0=00000480 private resources1=00000468 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000000b0 ACPI Processor ID=0x00000201 private resources=2 private resources0=000004cc private resources1=000004b4 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000000e0 ACPI Processor ID=0x00000300 private resources=2 private resources0=00000518 private resources1=00000500 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000000e0 ACPI Processor ID=0x00000301 private resources=2 private resources0=00000564 private resources1=0000054c Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000110 ACPI Processor ID=0x00000400 private resources=2 private resources0=000005b0 private resources1=00000598 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000110 ACPI Processor ID=0x00000401 private resources=2 private resources0=000005fc private resources1=000005e4 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000140 ACPI Processor ID=0x00000500 private resources=2 private resources0=00000648 private resources1=00000630 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000140 ACPI Processor ID=0x00000501 private resources=2 private resources0=00000694 private resources1=0000067c Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000170 ACPI Processor ID=0x00000600 private resources=2 private resources0=000006e0 private resources1=000006c8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000170 ACPI Processor ID=0x00000601 private resources=2 private resources0=0000072c private resources1=00000714 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000001a0 ACPI Processor ID=0x00000700 private resources=2 private resources0=00000778 private resources1=00000760 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000001a0 ACPI Processor ID=0x00000701 private resources=2 private resources0=000007c4 private resources1=000007ac Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000001d0 ACPI Processor ID=0x00000800 private resources=2 private resources0=00000810 private resources1=000007f8 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000001d0 ACPI Processor ID=0x00000801 private resources=2 private resources0=0000085c private resources1=00000844 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000200 ACPI Processor ID=0x00000900 private resources=2 private resources0=000008a8 private resources1=00000890 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000200 ACPI Processor ID=0x00000901 private resources=2 private resources0=000008f4 private resources1=000008dc Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000230 ACPI Processor ID=0x00000a00 private resources=2 private resources0=00000940 private resources1=00000928 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000230 ACPI Processor ID=0x00000a01 private resources=2 private resources0=0000098c private resources1=00000974 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000260 ACPI Processor ID=0x00000b00 private resources=2 private resources0=000009d8 private resources1=000009c0 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000260 ACPI Processor ID=0x00000b01 private resources=2 private resources0=00000a24 private resources1=00000a0c Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000290 ACPI Processor ID=0x00000c00 private resources=2 private resources0=00000a70 private resources1=00000a58 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000290 ACPI Processor ID=0x00000c01 private resources=2 private resources0=00000abc private resources1=00000aa4 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000002c0 ACPI Processor ID=0x00000d00 private resources=2 private resources0=00000b08 private resources1=00000af0 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000002c0 ACPI Processor ID=0x00000d01 private resources=2 private resources0=00000b54 private resources1=00000b3c Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000002f0 ACPI Processor ID=0x00000e00 private resources=2 private resources0=00000ba0 private resources1=00000b88 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=000002f0 ACPI Processor ID=0x00000e01 private resources=2 private resources0=00000bec private resources1=00000bd4 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000320 ACPI Processor ID=0x00000f00 private resources=2 private resources0=00000c38 private resources1=00000c20 Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID,WRITE_POLICY_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Data Write Policy=Write through Type=cache Length=24 Flags={SIZE_PROPERTY_VALID,ASSOCIATIVITY_VALID,CACHE_TYPE_VALID} NextLevel=0x00000000 Size=32768 Associativity=8 Cache type=Instruction Type=processor Length=28 Flags={ACPI_PROCESSOR_ID_VALID} Parent=00000320 ACPI Processor ID=0x00000f01 private resources=2 private resources0=00000c84 private resources1=00000c6c */ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20190405 (64-bit version) * Copyright (c) 2000 - 2019 Intel Corporation * * Disassembling to symbolic ASL+ operators * * Disassembly of /tmp/acpidump.SKCgYi/acpdump.din, Mon Mar 18 12:28:36 2024 * * Original Table Header: * Signature "DSDT" * Length 0x000076A9 (30377) * Revision 0x05 * Checksum 0x57 * OEM ID "ALASKA" * OEM Table ID "A M I " * OEM Revision 0x00000001 (1) * Compiler ID "INTL" * Compiler Version 0x20190509 (538510601) */ DefinitionBlock ("", "DSDT", 5, "ALASKA", "A M I ", 0x00000001) { Name (BDMD, "eMAG Falcon Board") Scope (_SB) { Name (CPCE, One) Name (LPIE, One) Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { If ((Arg1 != One)) { STS0 &= 0xFFFFFFE0 STS0 |= 0x0A } Else { If (((CAP0 & 0x0100) == 0x0100)) { CAP0 &= 0xFFFFFEFF STS0 &= 0xFFFFFFE0 STS0 |= 0x12 } If ((LPIE == One)) { CAP0 |= 0x80 } Else { CAP0 &= 0xFFFFFF7F } If ((CPCE == One)) { CAP0 |= 0x40 } Else { CAP0 &= 0xFFFFFFBF } } } Else { STS0 &= 0xFFFFFFE0 STS0 |= 0x06 } Return (Arg3) } Device (CL00) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000004, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000008, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000000C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000010, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000014, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000002C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000034, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000050, // Address 0x02, // Access Size ) } }) Device (CP00) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL00.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL00.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, Zero, 0xFD, 0x02 } }) } Device (CP01) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL00.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL00.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, Zero, 0xFD, 0x02 } }) } } Device (CL01) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000100, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000104, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000108, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000010C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000110, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000114, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000012C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000134, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000150, // Address 0x02, // Access Size ) } }) Device (CP02) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0100) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL01.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL01.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, One, 0xFD, 0x02 } }) } Device (CP03) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0101) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL01.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL01.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, One, 0xFD, 0x02 } }) } } Device (CL02) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000200, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000204, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000208, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000020C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000210, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000214, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000022C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000234, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000250, // Address 0x02, // Access Size ) } }) Device (CP04) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0200) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL02.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL02.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x02, 0xFD, 0x02 } }) } Device (CP05) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0201) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL02.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL02.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x02, 0xFD, 0x02 } }) } } Device (CL03) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000300, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000304, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000308, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000030C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000310, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000314, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000032C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000334, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000350, // Address 0x02, // Access Size ) } }) Device (CP06) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0300) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL03.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL03.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x03, 0xFD, 0x02 } }) } Device (CP07) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0301) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL03.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL03.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x03, 0xFD, 0x02 } }) } } Device (CL04) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000400, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000404, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000408, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000040C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000410, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000042C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000434, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000450, // Address 0x02, // Access Size ) } }) Device (CP08) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0400) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL04.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL04.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x04, 0xFD, 0x02 } }) } Device (CP09) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0401) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL04.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL04.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x04, 0xFD, 0x02 } }) } } Device (CL05) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000500, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000504, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000508, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000050C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000510, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000514, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000052C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000534, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000550, // Address 0x02, // Access Size ) } }) Device (CP10) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0500) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL05.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL05.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x05, 0xFD, 0x02 } }) } Device (CP11) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0501) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL05.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL05.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x05, 0xFD, 0x02 } }) } } Device (CL06) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000600, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000604, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000608, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000060C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000610, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000614, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000062C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000634, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000650, // Address 0x02, // Access Size ) } }) Device (CP12) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0600) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL06.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL06.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x06, 0xFD, 0x02 } }) } Device (CP13) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0601) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL06.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL06.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x06, 0xFD, 0x02 } }) } } Device (CL07) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000700, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000704, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000708, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000070C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000710, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000714, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000072C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000734, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000750, // Address 0x02, // Access Size ) } }) Device (CP14) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0700) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL07.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL07.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x07, 0xFD, 0x02 } }) } Device (CP15) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0701) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL07.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL07.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x07, 0xFD, 0x02 } }) } } Device (CL08) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x09) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000800, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000804, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000808, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000080C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000810, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000814, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000082C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000834, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000850, // Address 0x02, // Access Size ) } }) Device (CP16) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0800) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL08.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL08.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x08, 0xFD, 0x02 } }) } Device (CP17) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0801) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL08.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL08.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x08, 0xFD, 0x02 } }) } } Device (CL09) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0A) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000900, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000904, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000908, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x000000000000090C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000910, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000914, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x000000000000092C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000934, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000950, // Address 0x02, // Access Size ) } }) Device (CP18) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0900) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL09.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL09.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x09, 0xFD, 0x02 } }) } Device (CP19) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0901) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL09.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL09.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x09, 0xFD, 0x02 } }) } } Device (CL10) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0B) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000A2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000A34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000A50, // Address 0x02, // Access Size ) } }) Device (CP20) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0A00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL10.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL10.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0A, 0xFD, 0x02 } }) } Device (CP21) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0A01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL10.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL10.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0A, 0xFD, 0x02 } }) } } Device (CL11) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0C) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000B2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000B34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000B50, // Address 0x02, // Access Size ) } }) Device (CP22) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0B00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL11.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL11.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0B, 0xFD, 0x02 } }) } Device (CP23) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0B01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL11.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL11.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0B, 0xFD, 0x02 } }) } } Device (CL12) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0D) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000C2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000C34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000C50, // Address 0x02, // Access Size ) } }) Device (CP24) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0C00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL12.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL12.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0C, 0xFD, 0x02 } }) } Device (CP25) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0C01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL12.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL12.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0C, 0xFD, 0x02 } }) } } Device (CL13) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0E) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000D2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000D34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000D50, // Address 0x02, // Access Size ) } }) Device (CP26) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0D00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL13.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL13.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0D, 0xFD, 0x02 } }) } Device (CP27) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0D01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL13.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL13.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0D, 0xFD, 0x02 } }) } } Device (CL14) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x0F) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000E2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000E34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000E50, // Address 0x02, // Access Size ) } }) Device (CP28) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0E00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL14.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL14.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0E, 0xFD, 0x02 } }) } Device (CP29) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0E01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL14.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL14.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0E, 0xFD, 0x02 } }) } } Device (CL15) { Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID Name (_UID, 0x10) // _UID: Unique ID Name (_LPI, Package (0x05) // _LPI: Low Power Idle States { Zero, Zero, 0x02, Package (0x0A) { 0x000186A0, 0x000186A0, One, One, 0x64, Zero, 0x01000010, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluReten" }, Package (0x0A) { 0x00030D40, 0x00030D40, One, One, 0x64, Zero, 0x01000020, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CluPwrDn" } }) Name (PLPI, Package (0x06) { Zero, One, 0x03, Package (0x0A) { One, One, One, Zero, 0x64, Zero, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x00000000FFFFFFFF, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "WFI" }, Package (0x0A) { 0x2710, 0x2710, One, One, 0x64, One, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000001, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CoreReten" }, Package (0x0A) { 0xC350, 0xC350, One, One, 0x64, 0x02, ResourceTemplate () { Register (FFixedHW, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000010002, // Address 0x03, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, "CorePwrDn" } }) Name (PCPC, Package (0x15) { 0x15, 0x02, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F00, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F04, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F08, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F0C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F10, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F14, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000F2C, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (PlatformCommChannel, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000F34, // Address 0x02, // Access Size ) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (SystemMemory, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (PlatformCommChannel, 0x20, // Bit Width 0x00, // Bit Offset 0x0000000000000F50, // Address 0x02, // Access Size ) } }) Device (CP30) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0F00) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL15.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL15.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0F, 0xFD, 0x02 } }) } Device (CP31) { Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID Name (_UID, 0x0F01) // _UID: Unique ID Method (_LPI, 0, NotSerialized) // _LPI: Low Power Idle States { Return (PLPI) /* \_SB_.CL15.PLPI */ } If ((CPCE == One)) { Method (_CPC, 0, NotSerialized) // _CPC: Continuous Performance Control { Return (PCPC) /* \_SB_.CL15.PCPC */ } } Name (_PSD, Package (0x01) // _PSD: Power State Dependencies { Package (0x05) { 0x05, Zero, 0x0F, 0xFD, 0x02 } }) } } Device (HM00) { Name (_HID, "APMC0D29") // _HID: Hardware ID Name (_UID, "HWM0") // _UID: Unique ID Name (_DDN, "HWM0") // _DDN: DOS Device Name Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("eMAG Hardware Monitor Device")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (One) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "pcc-channel", 0x0F } } }) } Device (I2C1) { Name (_HID, "APMC0D40") // _HID: Hardware ID Name (_DDN, "I2CS1") // _DDN: DOS Device Name Name (_UID, "I2CS1") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("SMpro I2C Serial Bus")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "pcc-channel", 0x0A } } }) } Device (I2C2) { Name (_HID, "APMC0D40") // _HID: Hardware ID Name (_DDN, "I2CS2") // _DDN: DOS Device Name Name (_UID, "I2CS2") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("SMpro I2C Serial Bus")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "pcc-channel", 0x0D } } }) } Device (I2C4) { Name (_HID, "APMC0D0F") // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Name (_STR, Unicode ("eMAG I2C Device")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x126B0000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000069, } }) Device (IPI) { Name (_HID, "APMC0D8A") // _HID: Hardware ID Name (_CID, "IPI0001") // _CID: Compatible ID Name (_STR, Unicode ("IPMI_SSIF")) // _STR: Description String Name (_UID, Zero) // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_IFT, 0, NotSerialized) // _IFT: IPMI Interface Type { Return (0x04) } Method (_ADR, 0, NotSerialized) // _ADR: Address { Return (0x10) } Method (_SRV, 0, NotSerialized) // _SRV: IPMI Spec Revision { Return (0x0200) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x0010, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\\_SB.I2C4", 0x00, ResourceConsumer, , Exclusive, ) }) } Name (SSCN, Package (0x03) { 0x01AB, 0x01F3, Zero }) Name (FMCN, Package (0x03) { 0x57, 0x9F, Zero }) } Device (AHBC) { Name (_HID, "APMC0D06") // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (One) } Device (GPIO) { Name (_HID, "APMC0D81") // _HID: Hardware ID Name (_UID, "GPIO0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("DW GPIO v2 Device")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (One) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x126F0000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000049, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004A, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004B, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004C, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004D, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004E, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000004F, } }) Device (PRTA) { Name (_HID, "APMC0D82") // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (One) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "reg", Zero }, Package (0x02) { "snps,nr-gpios", 0x08 } } }) } OperationRegion (INTM, SystemMemory, 0x126F0044, 0x04) Field (INTM, DWordAcc, NoLock, Preserve) { MASK, 8 } Method (_INI, 0, NotSerialized) // _INI: Initialize { MASK = Zero } } Device (URT0) { Name (_HID, "ARMH0011") // _HID: Hardware ID Name (_CID, "PL011") // _CID: Compatible ID Name (_UID, Zero) // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x12600000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000062, } }) } Device (URT1) { Name (_HID, "ARMH0011") // _HID: Hardware ID Name (_CID, "PL011") // _CID: Compatible ID Name (_UID, One) // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x12610000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000063, } }) } } Device (SAT0) { Name (_HID, "APMC0D33") // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_STR, Unicode ("eMAG SATA")) // _STR: Description String Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_CLS, Package (0x03) // _CLS: Class Code { One, 0x06, One }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x1C000000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000006F, } }) } Device (SAT1) { Name (_HID, "APMC0D33") // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_STR, Unicode ("eMAG SATA")) // _STR: Description String Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_CLS, Package (0x03) // _CLS: Class Code { One, 0x06, One }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x1C100000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000070, } }) } Device (USB0) { Name (_HID, "808622B7") // _HID: Hardware ID Name (_DDN, "USB0") // _DDN: DOS Device Name Name (_UID, "USB0") // _UID: Unique ID Name (_CID, "PNP0D10" /* XHCI USB Controller with debug */) // _CID: Compatible ID Name (_STR, Unicode ("eMAG USB")) // _STR: Description String Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x13800000, // Address Base 0x00100000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000073, } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "dr_mode", "host" }, Package (0x02) { "usb2-lpm-disable", "" } } }) } Device (USB1) { Name (_HID, "808622B7") // _HID: Hardware ID Name (_DDN, "USB1") // _DDN: DOS Device Name Name (_UID, "USB1") // _UID: Unique ID Name (_CID, "PNP0D10" /* XHCI USB Controller with debug */) // _CID: Compatible ID Name (_STR, Unicode ("eMAG USB")) // _STR: Description String Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x13900000, // Address Base 0x00100000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000074, } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x02) { Package (0x02) { "dr_mode", "host" }, Package (0x02) { "usb2-lpm-disable", "" } } }) } Device (ET0) { Name (_HID, "APMC0D80") // _HID: Hardware ID Name (_DDN, "ET00") // _DDN: DOS Device Name Name (_UID, "ET00") // _UID: Unique ID Name (_SUN, Zero) // _SUN: Slot User Number Name (_STR, Unicode ("eMAG Ethernet RGMII v2 Device")) // _STR: Description String Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x00) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x1F140000, // Address Base 0x0000F000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000006B, } Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x0000006C, } }) Device (PHY3) { Name (_HID, "APMC0D89") // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (One) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "phy-channel", 0x03 } } }) } Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x06) { Package (0x02) { "mac-address", Package (0x06) { 0x00, 0x00, 0x29, 0x00, 0x00, 0x0F } }, Package (0x02) { "phy-channel", 0x05 }, Package (0x02) { "phy-mode", "rgmii" }, Package (0x02) { "max-transfer-unit", 0x05DC }, Package (0x02) { "max-speed", 0x03E8 }, Package (0x02) { "phy-handle", Package (0x02) { PHY3, Zero } } } }) } Device (PWRB) { Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID Name (_ADR, Zero) // _ADR: Address Name (_UID, Zero) // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0B) } } Device (GED0) { Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000054, } }) Method (_EVT, 1, Serialized) // _EVT: Event { Switch (ToInteger (Arg0)) { Case (0x54) { Notify (HED0, 0x80) // Status Change } } } } Device (GED1) { Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000048, } }) OperationRegion (PDDR, SystemMemory, 0x126F0004, 0x04) Field (PDDR, DWordAcc, NoLock, Preserve) { STDI, 1 } OperationRegion (INTE, SystemMemory, 0x126F0030, 0x04) Field (INTE, DWordAcc, NoLock, Preserve) { STDE, 1 } OperationRegion (INTT, SystemMemory, 0x126F0034, 0x04) Field (INTT, DWordAcc, NoLock, Preserve) { TYPE, 1 } OperationRegion (INTP, SystemMemory, 0x126F0038, 0x04) Field (INTP, DWordAcc, NoLock, Preserve) { POLA, 1 } OperationRegion (INTS, SystemMemory, 0x126F003C, 0x04) Field (INTS, DWordAcc, NoLock, Preserve) { STDS, 1 } OperationRegion (INTC, SystemMemory, 0x126F0040, 0x04) Field (INTC, DWordAcc, NoLock, Preserve) { SINT, 1 } OperationRegion (INTM, SystemMemory, 0x126F0044, 0x04) Field (INTM, DWordAcc, NoLock, Preserve) { MASK, 1 } Method (_INI, 0, NotSerialized) // _INI: Initialize { TYPE = Zero POLA = Zero STDI = Zero STDE = One MASK = Zero } Method (_EVT, 1, Serialized) // _EVT: Event { Switch (ToInteger (Arg0)) { Case (0x48) { If ((STDS & One)) { SINT = One Notify (PWRB, 0x80) // Status Change } } } } } Device (HED0) { Name (_HID, EisaId ("PNP0C33") /* Error Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID } Device (PMU0) { Name (_HID, "LNRO0007") // _HID: Hardware ID Name (_DDN, "PMU0") // _DDN: DOS Device Name Name (_UID, "PMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("PMU")) // _STR: Description String Name (_CID, "LNRO0007") // _CID: Compatible ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000017, } }) } Device (PMU) { Name (_HID, "APMC0D83") // _HID: Hardware ID Name (_DDN, "PCPPMU0") // _DDN: DOS Device Name Name (_UID, "PCPPMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("PCPPMU")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x78810000, // Address Base 0x00001000, // Address Length ) Memory32Fixed (ReadWrite, 0x7E200000, // Address Base 0x00001000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) { 0x00000052, } }) Device (PLC0) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU0") // _DDN: DOS Device Name Name (_UID, "L3CPMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU0")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E810000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", Zero } } }) } Device (PLC1) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU1") // _DDN: DOS Device Name Name (_UID, "L3CPMU1") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU1")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E830000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", One } } }) } Device (PLC2) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU2") // _DDN: DOS Device Name Name (_UID, "L3CPMU2") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU2")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E850000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x02 } } }) } Device (PLC3) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU3") // _DDN: DOS Device Name Name (_UID, "L3CPMU3") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU3")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E870000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x03 } } }) } Device (PLC4) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU4") // _DDN: DOS Device Name Name (_UID, "L3CPMU4") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU4")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E890000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x04 } } }) } Device (PLC5) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU5") // _DDN: DOS Device Name Name (_UID, "L3CPMU5") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU5")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E8B0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x05 } } }) } Device (PLC6) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU6") // _DDN: DOS Device Name Name (_UID, "L3CPMU6") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU6")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E8D0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x06 } } }) } Device (PLC7) { Name (_HID, "APMC0D84") // _HID: Hardware ID Name (_DDN, "L3CPMU7") // _DDN: DOS Device Name Name (_UID, "L3CPMU7") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("L3CPMU7")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E8F0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x07 } } }) } Device (PMB0) { Name (_HID, "APMC0D87") // _HID: Hardware ID Name (_DDN, "MCBPMU0") // _DDN: DOS Device Name Name (_UID, "MCBPMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCBPMU0")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E910000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", Zero } } }) } Device (PMB1) { Name (_HID, "APMC0D87") // _HID: Hardware ID Name (_DDN, "MCBPMU1") // _DDN: DOS Device Name Name (_UID, "MCBPMU1") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCBPMU1")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7E930000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", One } } }) } Device (PMC0) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU0") // _DDN: DOS Device Name Name (_UID, "MCUPMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU0")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EA50000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", Zero } } }) } Device (PMC1) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU1") // _DDN: DOS Device Name Name (_UID, "MCUPMU1") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU1")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EAD0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", One } } }) } Device (PMC2) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU2") // _DDN: DOS Device Name Name (_UID, "MCUPMU2") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU2")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EB50000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x02 } } }) } Device (PMC3) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU3") // _DDN: DOS Device Name Name (_UID, "MCUPMU3") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU3")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EBD0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x03 } } }) } Device (PMC4) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU4") // _DDN: DOS Device Name Name (_UID, "MCUPMU4") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU4")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EC50000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x04 } } }) } Device (PMC5) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU5") // _DDN: DOS Device Name Name (_UID, "MCUPMU5") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU5")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7ECD0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x05 } } }) } Device (PMC6) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU6") // _DDN: DOS Device Name Name (_UID, "MCUPMU6") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU6")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7ED50000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x06 } } }) } Device (PMC7) { Name (_HID, "APMC0D88") // _HID: Hardware ID Name (_DDN, "MCUPMU7") // _DDN: DOS Device Name Name (_UID, "MCUPMU7") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("MCUPMU7")) // _STR: Description String Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EDD0000, // Address Base 0x00001000, // Address Length ) }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "enable-bit-index", 0x07 } } }) } Device (PIOF) { Name (_HID, "APMC0D85") // _HID: Hardware ID Name (_DDN, "IOBPMU0") // _DDN: DOS Device Name Name (_UID, "IOBPMU0") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("IOBPMU0")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EE40000, // Address Base 0x00001000, // Address Length ) }) } Device (PIOS) { Name (_HID, "APMC0D86") // _HID: Hardware ID Name (_DDN, "IOBPMU1") // _DDN: DOS Device Name Name (_UID, "IOBPMU1") // _UID: Unique ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Name (_STR, Unicode ("IOBPMU1")) // _STR: Description String Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadWrite, 0x7EE60000, // Address Base 0x00001000, // Address Length ) }) } } Device (PCI0) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, Zero) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI0") // _UID: Unique ID Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x80 }, Package (0x04) { 0xFFFF, One, Zero, 0x81 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x82 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x83 } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000010000000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000010010000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000010000000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000010100000000, // Range Minimum 0x0000017FFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000007F00000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000010010200000, // Range Minimum 0x000001002FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000100F0000000, // Range Minimum 0x00000100FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000018000000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000028000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI0._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI0.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI1) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x00) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, One) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI1") // _UID: Unique ID Name (_STR, Unicode ("PCIe 1 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x86 }, Package (0x04) { 0xFFFF, One, Zero, 0x87 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x88 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x89 } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000007800000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000007810000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000007800000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007900000000, // Range Minimum 0x0000007FFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000700000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI1._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007810200000, // Range Minimum 0x000000782FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000078F0000000, // Range Minimum 0x00000078FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000008000000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000038000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI1._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI1._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI1._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI1.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI2) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x02) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI2") // _UID: Unique ID Name (_STR, Unicode ("PCIe 2 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x8C }, Package (0x04) { 0xFFFF, One, Zero, 0x8D }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x8E }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x8F } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000001000000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000001010000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000001000000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000001100000000, // Range Minimum 0x00000057FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000004700000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI2._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000001010200000, // Range Minimum 0x000000102FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000010F0000000, // Range Minimum 0x00000010FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000005800000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000003A800000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI2._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI2._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI2._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI2.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI3) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x03) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI3") // _UID: Unique ID Name (_STR, Unicode ("PCIe 3 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x92 }, Package (0x04) { 0xFFFF, One, Zero, 0x93 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x94 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x95 } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000005800000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000005810000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000005800000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000005900000000, // Range Minimum 0x0000005FFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000700000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI3._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000005810200000, // Range Minimum 0x000000582FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000058F0000000, // Range Minimum 0x00000058FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000006000000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000003A000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI3._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI3._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI3._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI3.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI4) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x04) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI4") // _UID: Unique ID Name (_STR, Unicode ("PCIe 4 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x98 }, Package (0x04) { 0xFFFF, One, Zero, 0x99 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x9A }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x9B } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000006000000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000006010000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000006000000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000006100000000, // Range Minimum 0x0000006FFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000F00000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI4._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000006010200000, // Range Minimum 0x000000602FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000060F0000000, // Range Minimum 0x00000060FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007000000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000039000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI4._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI4._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI4._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI4.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI5) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x05) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI5") // _UID: Unique ID Name (_STR, Unicode ("PCIe 5 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0x9E }, Package (0x04) { 0xFFFF, One, Zero, 0x9F }, Package (0x04) { 0xFFFF, 0x02, Zero, 0xA0 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0xA1 } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000007000000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000007010000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000007000000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007100000000, // Range Minimum 0x00000077FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000700000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI5._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007010200000, // Range Minimum 0x000000702FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000070F0000000, // Range Minimum 0x00000070FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007800000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000038800000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI5._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI5._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI5._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI5.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI6) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x06) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI6") // _UID: Unique ID Name (_STR, Unicode ("PCIe 6 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0xA4 }, Package (0x04) { 0xFFFF, One, Zero, 0xA5 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0xA6 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0xA7 } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000000600000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000000610000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000000600000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000700000000, // Range Minimum 0x00000007FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI6._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000610200000, // Range Minimum 0x000000062FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000006F0000000, // Range Minimum 0x00000006FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000800000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000003F800000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI6._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI6._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI6._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI6.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PCI7) { Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID Name (_CCA, One) // _CCA: Cache Coherency Attribute Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID Name (_SEG, 0x07) // _SEG: PCI Segment Name (_BBN, Zero) // _BBN: BIOS Bus Number Name (_UID, "PCI7") // _UID: Unique ID Name (_STR, Unicode ("PCIe 7 Device")) // _STR: Description String Name (_PRT, Package (0x04) // _PRT: PCI Routing Table { Package (0x04) { 0xFFFF, Zero, Zero, 0xAA }, Package (0x04) { 0xFFFF, One, Zero, 0xAB }, Package (0x04) { 0xFFFF, 0x02, Zero, 0xAC }, Package (0x04) { 0xFFFF, 0x03, Zero, 0xAD } }) Method (_CBA, 0, Serialized) // _CBA: Configuration Base Address { Return (0x0000000400000000) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RBUF, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x000000000000FFFF, // Range Maximum 0x0000000410000000, // Translation Offset 0x0000000000010000, // Length ,, , TypeStatic, DenseTranslation) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000030000000, // Range Minimum 0x00000000EFFFFFFF, // Range Maximum 0x0000000400000000, // Translation Offset 0x00000000C0000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000500000000, // Range Minimum 0x00000005FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI7._CRS.RBUF */ } Method (_DMA, 0, Serialized) // _DMA: Direct Memory Access { Name (RBUF, ResourceTemplate () { QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000000000000, // Range Minimum 0x00000000FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000100000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000410200000, // Range Minimum 0x000000042FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000000001FE00000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x00000004F0000000, // Range Minimum 0x00000004FFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000600000000, // Range Minimum 0x000003FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x000003FA00000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Return (RBUF) /* \_SB_.PCI7._DMA.RBUF */ } Name (SUPP, Zero) Name (CTRL, Zero) Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) SUPP = CDW2 /* \_SB_.PCI7._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI7._OSC.CDW3 */ If (((SUPP & 0x16) != 0x16)) { CTRL &= 0x1E } CTRL &= 0x1D If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI7.CTRL */ Return (Arg3) } Else { CDW1 |= 0x04 Return (Arg3) } } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x01 // . }) } } } Return (Buffer (One) { 0x00 // . }) } Device (RP0) { Name (_ADR, Zero) // _ADR: Address } } Device (PDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (PDRS, ResourceTemplate () { QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000010000000000, // Range Minimum 0x000001000FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007800000000, // Range Minimum 0x000000780FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000007000000000, // Range Minimum 0x000000700FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000006000000000, // Range Minimum 0x000000600FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000005800000000, // Range Minimum 0x000000580FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000001000000000, // Range Minimum 0x000000100FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000600000000, // Range Minimum 0x000000060FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x0000000000000000, // Granularity 0x0000000400000000, // Range Minimum 0x000000040FFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset 0x0000000010000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Return (PDRS) /* \_SB_.PDRC.PDRS */ } } } Method (MAIN, 0, NotSerialized) { Return (Zero) } }