! Syntax highlighting patterns for Verilog ! ! INSTALLATION ! ! Load this pattern by starting nedit with: ! ! nedit -import ! ! Then, check that the patterns were loaded correctly, and choose Save Defaults ! from the Preferences menu. The new patterns will now be incorporated into ! your own .nedit file, so the next time you start NEdit, you will no longer ! need to use -import. ! ! These comments will not appear in your ~/.nedit ! nedit.highlightPatterns: VerilogA:1:0{\n\ Comment:"/\\*":"\\*/"::Comment::\n\ cplus comment:"//":"$"::Comment::\n\ String Literals:"""":"""":"\\n":String::\n\ preprocessor line:"^[ ]*`":"$"::Preprocessor::\n\ Reserved WordsA:"<(module|endmodule|parameter|begin|end|initial|if|then|else|case|default|endcase|endfunction|for|function|while|generate|analog|initial_step|cross|final_step|timer|abstol|access|ddt|ddt_nature|discipline|enddiscipline|nature|endnature|exclude|flow|from|idt|idtmod|idt_nature|inf|potential|units|repeat|abs|acos|acosh|asin|asinh|atan|atanh|cos|cosh|exp|ln|log|max|min|pow|sin|sinh|sqrt|tan|tanh|analysis|bound_step|delay|laplace_nd|laplace_np|laplace_zd|laplace_zp|slew|transition|zi_nd|zi_np|zi_zd|zi_zp|;)>":::Keyword::\n\ Predefined Types:"<(electrical|voltage|current|magnetic|thermal|kinematic|kinematic_v|rotational|rotational_omega|inout|input|integer|output|parameter|real|realtime|strobe|wire)>":::Storage Type::D\n\ System Functions:"\\$[a-z_]+":::Subroutine::D\n\ Numeric Literals:"<([0-9.]*[TGMKkmunpfa]|[0-9]*'[hH][0-9a-fxz\\\\?_]+|[0-9]*'[oO][0-7xz\\\\?_]+|[0-9]*'[bB][01xz\\\\?_]+|[0-9.]+((e|E)(\\\\+|-)?)?[0-9]*|[0-9]+)>":::Numeric Const::\n\ Delay Word:"<((#\\(.*\\))|(#[0-9]*))>":::Ada Attributes::D\n\ Simple Word:"([a-zA-Z][a-zA-Z0-9]*)":::Plain::D\n\ Instance Declaration:"([a-zA-Z][a-zA-Z0-9_]*)([ \\t]+)([a-zA-Z][a-zA-Z0-9_$]*)([ \\t]*)\\(":::Plain::\n\ Module name:"\\1":""::Identifier:Instance Declaration:C\n\ Instance Name:"\\3":""::Identifier1:Instance Declaration:C\n\ Pins Declaration:"<(\\.([a-zA-Z0-9_]+))>":::Storage Type1::\n\ Special Chars:"(|,|;|=|&|!|<<|>>|-|/|%|^|~|<|>|!=|<\\+|\\.)":::Keyword::\n\ } nedit.languageModes: VerilogA:.va:::::: nedit.styles: Storage Type1:saddle brown:Bold ! generated by Jonathan David, Cadence Design 8/9/00